As shown in FIG. 1, prior art charge-coupled devices (CCD) 10 typically include a substrate 100 and a well 20 of the first conductivity type and buried channel 30 of the second conductivity type for the transfer of charge packets 40. A plurality of gates 50 is separated from the buried channel 30 by a thin insulating layer 60. For the purpose of illustration, the first conductivity type is p-type; the second conductivity type is n-type; and the CCD is of the two-phase type. The charge packets 40 are electrons flowing in the n-type buried channel 30. The opposite type of the electron charge packets 40 will be holes flowing in the p-type substrate or well 20.
Voltages applied to the gates 50 alter the potential energy within the buried channel 30 for the purpose of controlling the transfer of charge packets 40 through the charge-coupled device 10. The channel potential 45 in the buried channel 30 underneath each gate is plotted in FIG. 1. Additional p-type implants 35 are used to selectively alter the channel potential under the gates 50 for controlling the direction of charge packet 40 transfer.
If the CCD 10 is to be used as an imaging device, then the charge packets 40 transferred through the buried channel 30 were generated by photons. In the case of full frame type image sensors, the photoelectrons are generated directly in the CCD. In the case of interline transfer image sensors, the photoelectrons are generated in photodiodes adjacent to the CCD.
The gates 50 change voltage for the purpose of transferring charge packets 40 through the buried channel 30. The gates 50 are capacitive coupled to the p-well 20. A voltage change causes holes to flow in and out of the p-well 20 to the contact 110 at the end of the CCD 10. A view showing the p-well contacts 110 relative to the entire image sensor 130 is shown in FIG. 2. The image sensor 130 consists of a plurality of vertical CCD's 10 which transfer charge in parallel towards a serial horizontal CCD 120. The equivalent circuit is shown in FIG. 3. The capacitors C represent the coupling of the gates through the insulating layer to the p-well. The p-well has a resistance of R2 from one gate to the next along the direction of charge transfer. The final resistance between the p-well and the p-well contact 110 is represented as R1. In the case of a two-phase CCD, the gates are typically clocked as shown in FIG. 4. It is noted that when one gate has a voltage transition 91 the other gate has an equal but opposite voltage transition 92. The equally opposing voltage transitions only require holes to flow from one gate to its nearest neighboring gate through a resistance R2. As a result of the equally opposite voltage transitions, the voltage within the p-well is stable. In some cases, electron charge transfer requirements in the CCD channel requires non-equal voltage transitions on the gates as shown in FIG. 5. If V1 is held constant and only V2 is changed, then holes must flow from the p-well 20 (shown in FIG. 1) all of the way out of the CCD to (or from) the p-well contact 110. The resistive path of the p-well for the flow of holes can be extremely large. Especially in the case of very large image sensor containing thousands of gates. The p-well resistance could be many millions of Ohms. At the middle of the CCD, the p-well resistance is the sum total of all of the R2 resistances along the CCD channel and the final resistance from the CCD to the p-well contact R1. But for gates near the edge of the CCD, the p-well resistance is much smaller (the value of R1) since it is a short distance away from the p-well contact 10. This different resistances means the RC time constant will vary across the image sensor resulting in a non-constant voltage on the p-well. This is generally referred to as p-well bounce.
The p-well bounce can cause problems with the photo-diodes adjacent to the CCD in an interline CCD. The charge capacity of the photo-diode is determined by the relative voltage difference between the p-well 20 and the substrate 100. If the p-well bounces, it has a non-uniform voltage resulting in photodiodes near the p-well contacts 110 having a different charge capacity than photodiodes far away from the p-well contacts 110. The different charge capacities result in non-uniform photo-response patterns in an image sensor.
The prior art has focused primarily on reducing the values of R1 and R2 to make the RC time constant as small as possible. The prior art, such as in U.S. Pat. No. 5,736,756, discloses providing a p-well contact at every pixel site which would eliminate R1 and reduce R2 to an insignificant value. Contact is made with a low resistance metal thus eliminating the p-well bounce. Identical schemes are described in U.S. Pat. Nos. 6,3338,978 and 5,286,990. The drawback of adding a contact at each pixel site is significant manufacturing complexity and the contacts will act as a source of impurities contaminating the photodiodes and causing unwanted dark current generation.
U.S. Pat. No. 6,049,100 discloses adding additional p-well contacts between the vertical CCD and the horizontal CCD to reduce the p-well resistance. The drawback to this approach is that it only reduces the value of R1 and does nothing for the p-well located in the center of the image sensor (the value of R2). There is still a very large resistance from the center of the p-well to the additional p-well contacts.
Consequently, a need exists for a CCD that overcomes the above-described drawbacks.